A semiconductor memory device is under developing, which includes three-dimensionally disposed memory cells. For example, a NAND-type semiconductor memory device has a memory cell array that includes a plurality of control electrodes and semiconductor channels extending through the control electrodes. Furthermore, driving circuits, such as a row decoder and a sense amplifier and like, and a peripheral circuit electrically connected thereto are provided around the memory cell array. In order to enlarge the memory capacity of the semiconductor memory device, it is important to enlarge the occupancy of the memory cell array by effectively utilizing a pace of the chip surface in the layout of such a peripheral circuit. Further, it is also important to rationalize the formation process of the peripheral circuit so as to reduce the manufacturing cost.